This invention relates to a microwave oscillator using an active element for oscillation having three terminals.
Two types of conventional microwave oscillators are known, namely a series feedback type oscillator circuit and a parallel feedback type oscillator circuit as disclosed in Japanese Patent Publication No. Sho. 60-47764.
FIG. 1 shows an equivalent circuit of a prior art series feedback type oscillator circuit with drain grounding element in which element 1a is a field effect transistor (FET) element; element 2a is a gate terminal; element 3a is a drain terminal, and element 4a is a source terminal. Reference number 5a denotes a series feedback circuit composed of capacitive or inductive elements 6a and 7a; elements 6a and 7a are selected so that one is capacitive and the other inductive, or vice versa. The source terminal 4a is connected to a load 8a, and the other ends of the elements 6a, 7a, and 8a are commonly connected.
FIG. 2 shows a practical example of the conventional microwave oscillator described above. Elements in FIG. 2 which are the same as those shown in FIG. 1 are identified with same reference numbers. That is, element 1a is a FET; element 2a is a gate terminal, 3a is a drain terminal, and element 4a is a source terminal. Reference number 9a denotes a microstripline, one end of which is terminated at the gate terminal 2a and the other end at a terminal resistor 10a. Reference number 11a denotes a dielectric resonator, which is a disposed so as to be coupled to the microstripline 9a. Reference number 12a denotes a power source terminal, and element 13a is a 1/4 wavelength open-ended microstripline having a length of about 1/4 wavelength at the oscillation frequency. Reference number 14a denotes a self-bias resistor, and element 15a is a low pass filter. Reference number 16a denotes an output terminal.
In a conventional microwave oscillator as described above, the reactance caused due to a deviation of the line length of the 1/4 wavelength microstripline 13a from the accurate 1/4 wavelength corresponds to the element 6a in FIG. 1, and the resonant circuit composed of the dielectric resonator 11a and microstripline 9a corresponds to the element 7a in FIG. 1, so that the circuit in FIG. 2 is a series feedback oscillator circuit. In FIG. 2, when a direct-current power source is supplied from the power source terminal 12a, the potential at the gate terminal 2a becomes lower than the potential at the source terminal 4a due to the voltage drop by the current flowing in the self-bias resistor 14a. At this time, when the 1/4 wavelength open-ended microstripline 13a is connected to the drain terminal 3a, a negative resistance is generated at the gate terminal 2a, and the reflectivity as seeing the FET 1a side from the gate terminal 2a .GAMMA..sub.G becomes .vertline..GAMMA..sub. G .vertline.&gt;1. Assuming the reflectivity in the vicinity of the resonant frequency of the dielectric resonator 11a as seeing the microstripline 9a side from the gate terminal 2a to be .GAMMA..sub.R, if EQU .vertline..GAMMA..sub.R .vertline..multidot..vertline..GAMMA..sub.G .vertline..gtoreq.1 (1)
then repetitive reflection occurs between the gate terminal 2a and the microstripline 9a, and oscillation is initiated. Its output is obtained from the source terminal.
FIG. 3 shows an equivalent circuit of a conventional source-grounded parallel feedback oscillator circuit. Elements which are the same as those shown in FIG. 1 and FIG. 2 are identified with same reference numbers. That is, element 1a is a FET; element 2a is a gate terminal, 3a is a drain terminal, and element 4a is a source terminal. Reference number 17a denotes a parallel feedback circuit composed of capacitive or inductive elements 18a, and 19a; elements 18a and 19a are selected so that one is capacitive and the other inductive, or vice versa. The element 18a is connected between the gate terminal 2a and source terminal 4a of the FET 1a; the element 19a is connected between the gate terminal 2a and the drain terminal 3a of the FET 1a, and a load admittance element 20a is connected to the drain terminal 3a of the FET 1a.
FIG. 4 shows an equivalent circuit of a practical structure of parallel feedback type oscillator, in which element 1a is a FET; element 2a is a gate terminal; element 3a is a drain terminal, and element 4a is a source terminal. Reference numbers 21a and 22a denote open-ended microstriplines, which are electromagnetically coupled to a dielectric resonator 23a. Reference number 24a denotes an output terminal connected to the drain terminal. In the circuit shown in FIG. 4, in the vicinity of the resonant frequency of the dielectric resonator 23a, a positive feedback is applied from the drain terminal 3a to the gate terminal 2a by way of the microstriplines 21a and 22a, and the dielectric resonator 23a. Assuming the gain of this feedback route to be G.sub.R (.vertline.G.sub.R .vertline.&lt;1), and the gain between the gate terminal 2a and source terminal 3a of the FET 1a to be G.sub.F, if EQU .vertline.G.sub.R .vertline..multidot..vertline.G.sub.F .vertline..gtoreq.1(2)
then the circuit in FIG. 4 starts oscillation in the vicinity of the resonant frequency of the dielectric resonator 23a, and its output is obtained from the output terminal 24a.
In the constitution as shown in FIG. 1 then however, if the gain of the FET 1a is low or the gate-source capacity in the FET 1a is large, then the absolute value of reflectivity .vertline..GAMMA..sub.G .vertline. as seeing the FET 1a side from the gate terminal 2a is low, and the start of oscillation is not secure.
Yet, in the drain-grounded oscillator as shown in FIG. 2, if the FET 1a is a chip or if the entire circuit is fabricated in a monolithic integrated circuit, then the floating capacity which exists in the package FET does not exist, and the FET characteristic changes, and the negative resistance generated at the gate terminal decreases, and the stability of oscillation is lowered.
Or, in the circuit of FIG. 3, if the absolute gain .vertline.G.sub.F .vertline. of the FET 1a is low, or if the absolute gain .vertline.G.sub.R .vertline. of the feedback route feeding back to the gate terminal 2a from the drain terminal 3a through the microstriplines 21a and 22a and the dielectric resonator 23a is low, then oscillation is not started or the output is lowered.